Electronic identifying security system

ABSTRACT

An electronic identifying security system for use with one or more locks can be actuated only by valid keys that have a pattern of internal electrical conductors capable of applying an authorized permutation of binary signals to a plurality of input conductors of the security apparatus. The security apparatus has a lock opening mechanism and an alarm device. The alarm device is actuated either by application of a binary &#39;&#39;&#39;&#39;one&#39;&#39;&#39;&#39; signal to an input conductor for which a binary &#39;&#39;&#39;&#39;zero&#39;&#39;&#39;&#39; is proper, or else by a binary &#39;&#39;&#39;&#39;one&#39;&#39;&#39;&#39; on at least one but fewer than all of the input conductors for which a binary &#39;&#39;&#39;&#39;one&#39;&#39;&#39;&#39; is proper. In addition to the foregoing internal conductors, additional internal conductors are permuted to identify the keys in groups and individually. Lost keys can be prevented from working without changing the general combination by reprogramming the apparatus to specifically exclude them. A portion of the system is switchable from a mode of operation in which it excludes individual keys to a mode of operation in which it excludes groups of keys. In a security system that has a plurality of door locks, groups of keys can be made capable of unlocking some doors but not others.

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( agga. Nov. 26, 1974 one or more locks can be actuated only by validkeys ELECTRONIC IDENTIFYING SECURITY SYSTEM that have a pattern ofinternal electrical conductors capable of applying an authorizedpermutation of bi- [75] Inventor Robert Hedm Mich nary signals to aplurality of input conductors of the [73] Assignee: Eaton Corporation,Cleveland, Ohio security apparatus. The security apparatus has a lockopening mechanism and an alarm device. The alarm [22] Flled' May 1973device is actuated either by application of a binary [21] Appl. No.:359,714 one signal to an input conductor for which a binary zero isproper, or else by a binary one on at least 52 US. Cl 340/147 MD,317/134 1 E {f R 51''. the input for 51 Int. Cl. G06k 7/06 H04q 3/00 wone l foregoing internal conductors, additional internal con- [58] Fieldof Search..... 340/147 R, 147 MD, 149 R, d

340/149 A, 317/134 uctors are permuted to identify the keys in groupsand individually. Lost keys can be prevented from 56] References Cited:veorking without changing the general combination by programming theapparatus to specifically exclude UNITED STATES PATENTS them. A portionof the system is switchable from a 3,622,991 1 /19 1 ehrer 340/147 MDmode of operation in which it excludes individual keys 3,7l0,3l6 1/]973Kromer 3l7/l 34 X to a mode of operation in it excludes groups of3,732,542 5/1973 Hedin 340/149 A keys. In a Security System that has aplurality f door locks, groups of keys can be made capable of unlock-Primary Examiner-Donald J. Yusko m some doors but not Others Attorney,Agent, or FirmTeagno & Toddy ABSTRACT 11 Claims, 4 Drawing Figures Anelectronic identifying security system for use with Z4 7 20 26 /4 /8 22Z 5 5 R/ 2222 1 /A/PUTS Ag INPUTS f O r ALARM 1 O/RCU/T OTHER raw/Msfflff KEY IP/mw fifCOflM/G CIRCU/Z' 2505 54645 I i KC 1PATENTELIIHYZEIQN 3.851.314

SHEEI 20F 3 POWER SUPPL Y FIG. 3

1 ELECTRONIC IDENTIFYING SECURITY SYSTEM BACKGROUND OF THE INVENTION Akey actuated electronic security system was disclosed in a patent to R.A. l-Iedin et al. U.S. Pat. No.

27,013, reissued on Dec. 22, 1970. That patent relates tacle islocatedin a conveniently exposed position adjacent a door which is to belocked. Electrically conductive keys are provided which, when insertedin the key receptacle, establish binary one signals on certain of the.input conductors in the receptacle and binary zero" signals on othersof the input conductors. The key'provides conducting paths from a powerconductor in the receptacle to the input conductors which are to. havebinary ones" thereon and functionsas a switch between those inputconductors and the power conductor. For brevity, those ones of thereceptacles input conductors to which a logic one voltage is applied bya proper-key are referred to herein as the true input conductors, whilethose to which a proper key applies no voltage, which is a logic zero,are termed the false input conductors. When a key applies a properpattern of binary signals to the input conductors, internal decodingcircuitry actuates an electrically operable lock to unlock the door.Keys having an incorrect permutation, and other picking devices, arerecognized by the system, which is not actuated by them. The apparatusactuates an alarm signal when some picking devices are employed.

' In the above-cited prior art, the lock mechanism took account ofsignals on both the true and the false inputs, but the alarm deviceconsidered only the latter. Only the input conductors of the combinationfor which binary 2ero" signals were proper, were capable of actuatingthe alarm device, which they did when a binary one" was present insteadof the expected binary zero.

Another key actuated security system ofthe prior art had provision forindividually identifying a plurality of keys which were capable ofopening the lock, by providing additional bits in the keys and in thekey receptacle beyond the number of bits employed for the combinationofthe lock. The internal decoding circuitry couldbe programmed withpatch cords to invalidate one or more of the keys, such as lost keys,without having to change the combination of the lock, which was presenton only some of the input conductors. Individual keys that were thusruled out were thereafter incapable of operating the lock mechanism butdid actuate the alarm device.

SUMMARY OF THE INVENTION The present invention is an'electronicidentifying security apparatus having subcircuits for actuating a lockand an alarm device.

In the preferred embodiment all of the true input conductors of the keyreceptacle, which should have logic one" signals, are connected by meansof patch cords to inputs of an AND gate, which is referred to herein asthe true AND gate. All of the false input conductors, which should havezeros, are connected by patch cords to inputs of an OR gate, which isreferred to as the false OR gate. When all of the input signals to thetrue AND gate are ones and all of the input signals to the false OR gateand zeros, the lock is unlocked.

The alarm device, unlike the lock, is preferably actuatedin response toan attempted entry in which at least one of the true input conductorsdoes not have a binary one applied to it, and at the same time, at leastone of the true input conductors does have a binary one applied to it.The alarm device is also actuatable by the occurrence ofa binary onesignal on false inputconductors.

The alarm device is made responsive to the attempted entry describedabove in which less than all of the true inputs have binary ones byproviding, in addition to the true AND gate which receives signals fromall of the true input conductors, an alarm OR circuit which ascertainswhether or not at least one binary one signal is present at the trueinput conductors. The alarm OR circuit is a different OR circuit thanthe false OR gate mentioned above. The outputs of the true AND gate andthe alarm OR circuit are combined to produce a first signal capable ofactuating the alarm when at least one but less than all of the trueinput conductors has a logic one" signal.

The alarm device is made responsive to the abovementioned occurrenceof-a binary one signal on false input conductors by utilizing a secondsignal, derived from the output of the false OR gate. The first andsecond signals are combined in a further OR circuit so that either thetrue or-the false input conductors can serve as sources of alarm, toactuate the alarm device.

One particular false conductor is preferably arranged to inhibitunlocking if a binary one is present thereon, but not to actuate thealarm. This prevents a tamperer from determining the general combinationby deliberately actuating the alarm from one input conductor at a time.I

To avoid having to change the general combination, and hence to changeall of the keys, every time that a key is lost, provision is made forruling out individual keys by programming means such as patch cords.Each key has extra digits for identifying it. Individually ruledout keyscannot open the lock even though they have the correct generalcombination.

The present invention preferably also has a logic circuit which can beswitched, by means such as patch cords, to enable the same logiccircuitry to be used in either of two modes of operation, namely toexclude or rule out individual identified keys such as lost .keys, or torule out an entire subgroup of keys while still permitting other keys tooperate the equipment as before.

Theinvention has further patch cord switching provisions for enablingparticular logic subcircuits to be employed either (a) to rule out agreater number of individual identified keys, or else (b) to increasethe security of the system by increasing the number of statisticalpermutations available for individual identification of keys, as will bedescribed more fully hereinafter.

Accordingly, one object of the present invention is to provide anelectronic identifying security apparatus to which a valid combinationof binary signals must be applied by a key to actuate a lock mechanism,and also having an alarm device responsive to tampering, the

alarm device being actuatable either (a) by simultaduced by a logic zeroon a true input conductor, or (b) by a logic one signal on a false inputconductor.

A further object is to provide an electronic identifying securityapparatus as noted immediately above and in which the signal indicatingan attempted entry is a binary one signal on'a true input conductor.

Still another object is to provide an electronic identifying securityapparatus as above and in which at least one input conductor, whensubjected to an improper signal, inhibits unlocking of the mechanism butdoes not actuate the alarm, to baffle a tamperer.

Another object is to provide an electronic identifying securityapparatus as noted in the first object and in which, in addition, ameans is provided for delaying the actuation of the alarm device for atime after binary input signals are applied to the apparatus.

Yet another object of the invention is to provide an electronicidentifying security apparatus for use with a plurality of keys that aredifferently encoded in subgroups, and having a first decoding device foraccepting all of the plurality of keys to unlock the mechanism,

' and having a second decoding device for overruling the acceptance ofkeys belonging to a predetermined subgroup of the plurality of keys, andin which the keys have additional encoding digits for differentiatingindividual keys of the subgroup from each other, the apparatus alsohaving switching means for making the second decoding deviceoperative-and inoperative to overrule the first decoding device, toprevent unlocking by any of the keys of the predetermined subgroup.

Yet a further object is to provide an electronic identifyingsecurity'apparatus as noted in the immediately preceding object and inwhich the switching means cooperates with logic circuit portions of thesecond decoding device to render the apparatus responsive either toprevent unlocking by individual keys or to prevent unlocking by all keysof a subgroup.

Another object is to provide an electronic identifying securityapparatus having a plurality of decoder subcircuits-each having apredetermined number of code digits for identifying individual keys tobe ruled out, and having switchingv means for interconnecting thedecoder subcircuits to provide fewer decoder subcircuits each havingmore digits and thereby to provide more possible encoding permutationswith a resulting increase in security.

BRIEF DESCRIPTION OF THE DRAWINGS Other objects and features of theinvention will become more apparent upon consideration of the accom- Upanying description and drawings, in which:

DESCRIPTION In a preferred embodiment of the invention a door 10 shownin FIG. 1 is equipped with a locking bolt 12, which is moved in and outof locking engagement with the door 10 by an electric lock device 14. Ata location 16 near the door, provision is made for insertion of aspecial key 18 which is shown schematically at the left side of FIG. 1,To unlock the door 10 the key 18 is inserted into a key receptacle 20 atthe location 16, in which the key 18 performs connecting functions bymaking contact with input conductors 22 in the key receptacle. A numberof patch cords 24 are inserted to connect the input conductors 22 to anumber of input terminals 26 of decoding circuit 28. The decodingcircuit 28 includes a power supply 30 by which dc power is applied toone conductor 32 of the key 18 byway of a circuit path comprising one ofthe terminals 26, one of the patch cords 24, one of the input conductors22, and the conductor 32 of the key 18. Upon insertion of the key 18 inthe key receptacle 20 the voltage onthe conductor 32 is applied by otherinternal conductors of the key 18 to certain ones of the inputconductors 22 and not to others. Thus the various input conductors 22receive a set of input signals in accordance with a predeterminedpermutation of continuous and discontinuous conductors in the key 18.The binary pattern of input signals established by the key 18 isautomatically examined by the decoding logic circuit 28, which respondsby supplying a signal to the electric lock 14 to unlock the door 10 whena proper authorized key 18 has been inserted.

When an unauthorized key is inserted in the receptacle 20, an improperpattern of electrical signals is applied to theinput conductors 22, andthe electric lock 14 doesnot operate to unlock the door. The decodingcircuit 28 is arranged to minimize the probability that the door 10 canbe unlocked by the application of spurious signals of any type to theinput conductors 22 from an unauthorized 'key or other picking device.Such other devices include sources of external voltage arranged forapplication at the key receptacle 20 in attempts to pick the lock 14.Certain types of improper signals at the input conductors 22 stimulatethe decoding circuit 28 to produce an actuating signal for an alarmcircuit 34. The alarm circuit has provisions for operating an audible orvisual alarm device or an information circuit indicating that an attemptis being made or has been made to pick the lock 14.

The decoding circuit 28 includes lock logic circuits, alarm logiccircuits, rule-out logic circuits and miscellaneous circuits. The locklogic circuits are included in portions of FIGS. 2, 3, and 4, which showthe decoding circuit 28 in more detail. A group of true input terminals26T, FIG. 2, is connected to an AND gate 35, which provides an outputsignal to a combining circuit 37, the output of which actuates theelectric lock 14.

Other terminals 26F, each of which receives a logic zero" voltage uponinsertion ofa valid key 18 into the receptacle 20, have connections toan OR circuit 39. The OR circuit 39 provides a second input for thecombining circuit 37, to assist the combining circuit 37 in determiningwhether it should or should not supply an actuating signal to unlock theelectric lock 14. FIG. 2 has been simplified for clarity.

As shown on FIG. 3, the true input terminals 26T of the logic circuit 28areconnected to the logic AND circuit 35 comprising diodes 38 and aresistor 42. So long as all of the terminals 26T have logic one"voltages applied to them, all of the diodes 38 are back-biased slightly,and only a relatively small current flows in resister 42, so that thevoltage at an output terminal 40 terminal 40 is made relatively low.

The combining circuit 37 is fundamentally an AND circuit for combiningsignals from the true AND gate .35 and the false OR gate 39.

The combining circuit 37 receives a signal from the AND gate outputterminal 40, and passes that signal through a time delay filter circuitcomprising a resistor 44 in series and a capacitor 46 in shunt, as shownin FIG. 4. The signal at the junction of the resistor 44 and thecapacitor 46 is applied to the base electrode of a first transistor 48of an amplifier which includes transistors 48, 50 and 52. At the base ofthe transistor 48 the signal derived from the true AND gate outputterminal 40 is combined with a signal from the false inputs in a mannerto be described hereinafter.

The transistor amplifier 52 operates the electric lock -14. A collectorterminal of the transistor 52 is connected to one terminal 54 of astrike-actuating coil 55 of the electric lock 14, and the emitter of thetransistor 52 is connected to ground potential. A second terminal 56 ofthe strike-actuating coil 55 is connected to the bolt 12 from lockingengagement with the door to unlock the door. When a logic zero signalexists at amplifier 52 is in a non-conducting state, and no currentflows through the strike-actuating coil 55 so that the door 10 is notunlocked.

Each of the true terminals 26T of the decoding circuit 28 is connectedto the anode of a respective seriesconnected diode 43, whosepur'pose isto prevent a tamperer from obtaining information about the proper lockcombination by making voltmeter or ohmmeter readings at the inputconductors 22 of the key receptacle 20. The diodes 43 together with theshunt resistors 36 give the true input terminals 26T anappearance likethat of the false input terminals 26F, as by from measuring devicesemployed atthe key receptacle 20.

The false input terminals 26F are connected so as to prevent the lock 10from opening unless they all have logic zero" signals. Each of the falseinput terminals 26F isconnected to the anode of a diode 58, FIG. 3 whosecathode is connected to the cathodes of all of the other diodes 58incommon to an OR output terminal 60. The diodes 58, together with tworesistors 62, 64 of FIG. 4, from the diode OR circuit 39. When apositive voltage, representing a logic one signal, is wrongfully appliedto any one or more of the false input terminals 26F, a logic one"voltage appears at the OR .the true AND-gate output terminal 40, thetransistor j output terminal 60, and the electric lock 14 is preventedby the combining circuit 37 from operating. A logic one signal at the ORoutput terminal 60 causes a current to flow in a series resistor 66 tothe base electrode 68 of an NPN transistor 70, FIG. 4.

The OR output terminal 60 is also connectd through a diode 69 to ashunt-connected capacitor 71 from which a series-connected resistor 73carries a signal to the same base electrode 68 of the transistor 70 toinsure a fast rise and relatively slow vdecay of the signals I beingtransmitted from the terminal 60 to the electrode 68. The capacitor 71together with the resistor 73 forms a time delay circuit which providesa time delay only for removal of the signals as experienced at the baseelectrode 68.-

Signals from the false OR gate 39 are passed through the transistor 70and combined with signals from the true AND gate 35 to control the lock.The'emitter'of the transistor 70. is connected to ground and thecollector is connected to the cathode of a diode 72 whose v anode isconnected to the base electrode of the transistor 48. A logic one"signal on the false OR output terminal 60 causes the transistor 70 toconduct collector current and therefore to short-circuit the baseelectrode of the transistor 48 to ground through the diode 72. Thisshort-circuiting action prevents the amplifier consisting of thetransistors 48, 50, and 52, from operating to unlock the door 10. Thus,the base circuit of the transistor 48 functions as a two-input ANDcircuit, one of the inputs being a signal from the resistor 44representing the'true input terminals 26T, and the other input beinga-signal received through the diode 72 and representing the false inputterminals 26F. Acceptable signals must be present at both of the inputsof this AND circuit in order to unlock the door. An acceptable patternof signals is, of course, one in which all of the true input terminals26T have binary one signals applied to them and all of the false inputterminals 26F have binary zeros.

Logic circuits for actuating the alarm circuit 34 are shown in portionsof FIGS. 2, 3, and 4. The alarm combining circuit 75 of FIG. 2 receivesinput signals from the true AND gate 35, and combines them with anotherinput signal derived from the false OR gate 39. The output of the alarmcombining circuit -75 is connected to the alarm circuit 34 to actuatethe alarm circuit 34 when improper signals are applied to either thetrue input terminals 26T or the false input terminals 26F. The combiningcircuit 75 for alarm signals is more fully shown in FIG. 4.

With regard to actuation of the alarm by signals from the true inputterminals 26T, two requirements must be fulfilled to cause an alarm: (a)an entry must be attempted, and (b) at least one of the true terminals26T must have a logic zero." The output terminal 40 of the true AND gate35 supplies a signal through a series resistor 74 and through twoseries-connected voltagedropping diodes 76 to a base terminal 78 of anNPN transistor 80. A logic zero exists at the base terminal 78 when oneor more of the true input terminals 26T has a logic zero" signal.

The fact that an entry isbeing attempted is detected in the preferredembodiment by an OR circuit comprising diodes 81 and 83 and resistors 85and 87, FIG. 4.

This circuit is indicated symbolically on FIG. 2 by the line 77. Theanodes of the diodes 81 and 83 are connected respectively to two of theinputs of the true AND circuit 35 at the junctions of the resistors 36and diodes 38, FIG. 3. Additional diodes could be conhected in the sameway to the other inputs of the true AND circuit 35 also, if desired. Alogic one signal at either of the true input terminals 26T to which thediodes 81, 83 correspond creates a logic one signal at the OR circuitload resistor 85. A voltage on the OR circuit load resistor 85 isapplied to a series resistor 87 leading to the collector terminal of thetransistor 80.

The series resistor 87 is one of two inputs to an AND gate, transistors80; the base circuit 78 of the transistor 80 is inverted second input tothe AND gate 80. The OR circuit diodes 81, 83 whose outputs areconnected through the resistor 87 serve as a collector voltage sourceforthe transistor 80 when an entry is being attempted. An output voltageappears at the collector of the transistor 80 only if the OR circuitresistor 87 is transmitting a logic one, AND the base electrode 78 ofthe transistor 80 simultaneously has a logic zero. The base electrode 78has a logic zero" only when the output terminal 40 of the true AND gate35 has a logic zero, and this occurs only when less than all of the trueinput terminals 26T have a logic one input. Thus it may be seen that ifone or more of certain ones of the input terminals 26T corresponding tothe diodes 81 and 83 has a logic one," and one or more logic one signalsis absent from the array 26T of true input terminals, an alarm canoccur.

The foregoing signal at the collector of transistor 80, derived from thetrue input terminals 26T, is connected through circuitry to an OR gatewhose other input is derived from the false input terminals 26F. Thecollector of transistor 80 is connected to a series resistor 82 andthence to a shunt capacitor 84, to cause a time delay or low-passfiltering effect on any signal that occurs at the collector of thetransistor 80. A junction 86 of the resistor 82 and the shunt capacitor84 is connected to the base of an NPN transistor 88 whose emitter isconnected through a resistor 90 to a junction 92 of the aforementionedresistors 62 and 64. The resistors 90 and 62 are two inputs ofa wired ORcircuit having the output terminal 92. At the OR output terminal 92,alarm signals from the true input terminals 26F are combined with alarmsignals from the false input terminals 26F.

The OR output terminal 92 is connected to the gate electrode of asilicon control rectifier 94 whose anode circuit is connected in serieswith the alarm device 34. A logic one signal on the terminal 92 resultsin actuation of thealarm circuit 34. A capacitor 96 is connected inparallel with the resistor 64 to provide a time delay and filteringaction on signals at the terminal 92.

. 62 and 90, which controls the alarm.

The security apparatus has circuits which provide for invalidating oneor more particular keys which may previously have been valid, and whichit is subsequently desired to exclude from operating the equipment, or

for invalidating, as a group, a particular group of keys. An example ofasituation in which it may be desired to invalidate a particular key isone in which the security system is being utilized to lock an industrialplant, one of whose key-carrying employees has been discharged but hasnot returned his key. The key of the discharged employee can beinvalidated without changing the general combination of the entiresystem. This is possible because each key is provided with digits whichidentify that particular key and which are not examined by the true andfalse input circuits 35, 39 in ascertaining whether or not the keyconforms to the locks general combination.

The extra binary digits of each key, being unique, identify it and makepossible the invalidation of one or more particular keys by insertingpatch cords in a patch board. The patch cords connect the identifyingdigits of each key to a rule-out decoder circuit R, FIG. 2. The rule-outdecoder circuit recognizes ruled-out or invalidated keys by theiridentifying digits and prevents the electric lock 14 from being openedby such keys, even though they have the correct general combination.Moreover, an attempted entry with a ruled-out key causes the alarmcircuit 34 to be actuated. Rule-out patchboard terminals 26R, and therule-out AND gates, which are principally decoders for recognizingruled-out keys, are shown in relation to other subcircuits of theapparatus in FIG. 2.

To rule out a particular key the input terminals of one specificrule-out AND gate are connected by patch cords to the particular ones ofthe input conductors 22 which serve as identifying binary one inputs forthe particular key which is to be ruled out. When that particular key isinserted in the receptacle 20, it causes binary one" signals to appearon those particular ones of the input terminals 22, and therefore toappear on all of the inputs of the specific AND gate which has beenconnected to serve as a rule-out AND gate for that particular keyxTheoutput of that AND gate thereupon has a logic one signal. That logic onesignal on the AND gate output terminal is transmitted through an ORcircuit and is amplified to create a first output signal to inhibit thelock, and a second output signal to actuate the alarm.

schematically, the rule-out circuit 79, as shown in FIG. 3, comprises aplurality of rule-out AND gates 98 to which the rule-out terminals 26Rare connected as inputs. The outputs of the AND gates 98 are all con--nected together to the base .100 of an NPN transistor amplifier l02. Theamplifier 102 is an emitter follower having two outputs, 104 and 106.-

The first output 104 is provided for preventing actua-v tion of theelectric lock 14 despite the presence of a correct general combinationin a ruled-out key as indicated by valid signals at the true and falseinput terminals 26T and 26F respectively. The first output 104 connectsthrough a series resistor 108 to the base terminal 68 of the transistor70. This represents one of a plurality of OR inputs to the transistor70, any one of which is capable of preventing the lock from opening.

false OR circuit 39. The circuit 106 serves therefore as an additionalinput to the false OR circuit 30, whose other inputs comprise the falseinput terminals 26F.

"Typical interior-connections of the diode AND gates 98 are shown fortwo of them, 98a, 98b. The AND circuit rule-out gate 98a comprisesdiodes 114, and a resistor 116'. The occurrence of a logic zero signalon any input of the AND gate 98a establishes a logic zero signal and anoutput terminal 120 of the AND gate. The output terminals of the ANDgates 98 are all connected through OR diodes 122 to the base 100 of thetransistor 102. Consequently, if at least one of the AND gates 98 has alogic one" signals at all of its input terminals, a logic one signalappears at the base 100. Such a logic one signal at the base 100maintains the door locked by means of the circuit 104, and causes thealarm circuit 34 to be actuated by means of the circuit 106.

In a security system employing a plurality of locks and keys, it issometimes desirable to rule out certain groups of keys from operatingcertain locks. For example, all of the keys may have a generalcombination for opening the outside doors of a plant, and only certainones of those keys may give the bearer access to the accountingdepartment but not to the engineering department, while others of thosekeys may give the bearer access to the engineering department but not tothe accounting departmentqThis is accomplished by encoding the generalcombination digits of the keys all alike, but encoding the identifyingdigits in groups so that some of the identifying digits are alike forall of the keys of one group but are different from the identifyingdigits of a different group. In addition to the groupidentifying digits,each key has digits which uniquely identify the individual key. Therule-out circuits 79 v have provision for ruling out groups, using atwo-bit code for identifying groups. To use the rule-out AND gates 98a,for example, for group rule-out, a jumper l24'is removed to create twotwo-input AND gates instead of one four-input AND gate 98a. In order tocomplete the conversion from a four-input AND gate to two two-input ANDgates, a diode similar to the diode 122 must be inserted in a socket126, and a resistor similar to the resistor 116 must be inserted inanother socket 128. Any key which has two group-identifying digits thatcorrespond to digits that are patched to the input terminals 130, 132establishes a logic one at the AND gate output terminal 120, which istransmitted through the OR diode 122 to actuate the amplifier 102, whichprevents unlocking of the lock and actuates the alarm. The groupsrule-out capability does not preclude ruling out of individual keys withother rule-out AND gates 98.

In the preferred embodiment, at least one of the digits, i.e,, internalconductors, of each key is employed for a power supply connection to thekey 18 from the keyreceptacle 20. Some other digits of each key are usedfor establishing the binary signals that are re- .quired for fulfillingthe general combination of the lock.- Others of each keys digits can beemployed for group identification. Still other digits are used foruniquely identifying each key. The remaining digits are merely toimprove security by their numerical pres- .ence; the apparatus isindifferent to the signals, if any, on these last-named digits. Morepermutations of inputs for individually identifying keys can be obtainedby a connection which can be effected by means of a patch cordinterconnecting two of the diode AND gates 98. The terminals at whichsuch a connection are made are the terminals 134 of FIG. 3. Insertion ofa patch cord to connect together the terminals 134 effectively convertstwo four-input AND gates 98 to one eightinput AND gate. Although thismakes fewer rule-out AND gates available for ruling out keys, it makespossible the issuance of a greater number of uniquely encoded andidentified 'keys while retaining the rule-out capability for a limitednumber of keys, and is convertible by patching.

A further feature of the invention prevents an alarm when the lock 14 isbeing unlocked. A connection is provided from the collector terminal ofthe transistor 48 to the collector terminal of the transistor 88, FIG.4. The collector terminal of the transistor 48 is connected to the powersupply 30 by a series resistor 138. When the transistor 48 is conductingcollector current, which occurs whenever the electric lock 14 is to beunlocked, the voltage at the collector terminal of the transistors 48and 88 is relatively low because of resistive voltage drop in theresistor 138, and the transistor 88 is therefore prevented fromtransmitting an alarm signal through the resistor 90 to the electrode92.

A further miscellaneous important feature of the invention involves aninput terminal 140 of the decoding circuit 28, FIG. 3. This terminal 140is provided to prevent tamperers from discovering the generalcombination of the lock by ringing the alarm. When the te'rmi-' nal 140is energized by an externally applied signal at the key receptacle, thelock mechanism 14 is prevented from unlocking, and the alarm device 34is prevented from being actuated.

When a tamperer applies a probing signal voltage to one input conductor26 at a time, the terminal 140, which is actually a false input terminalfrom the standpoint of the lock mechanism 14, appears to the tamperer bea true input, because it-results in no alarm indication. The tampererwill consequently include the terminal 140 in the group of terminals towhich he simultaneously applies binary one" signals when he attempts toopen the lock. A binary one signal on the terminal 140 frustrates theattempt by silently maintaining the lock mechanism in a lockedcondition.

These results are accomplished by conducting a signal from the terminal140 through a resistor 142 to the base 68 of the transistor 70. Theresistor 142 is one of many inputs of the wired resistive OR circuitwhose OR output terminal is the base terminal 69. A logic one" at thebase 68 prevents the lock 14 from opening.

Silencing of the alarm upon a one signal at the terminal 140 involves adiode 136, FIG. 4. Diode 136 is connected from the collector terminal ofthe transistor 80 to the collector of the transistor 70. A logic zero atthe transistor 70, such as occurs ifa logic one signal exists on thespecial false input terminal 140, results in conduction of current fromthe collector of the transistor 80 through the diode 136 and through thecollector-to-emitter circuit of the transistor to ground. In

this way, the transistor 70 short-circuits to ground any If theprogrammer wishes to do so, he may instead employ the circuitry of theterminal 140 to act as a total rule-out circuit. This is accomplishedbyenergizing the {input conductors including first and second subsets,

each conductor of said first and second subset capable of having asignal of first and second binary states respectively establishedthereon, an alarm device, first circuit means connected with said firstsubset for producing a first control signal in the absence of said firstbinary state on at least one conductor of said first subset, secondcircuit means connected with said second subset for producing a secondcontrol signal in the absence of said second binary state on at leastone conductor of said second subset, third circuit means connected toreceive a binary signal from at least one of said plurality ofconductors upon attempted connection of said first and second subsets tosaid first and sec- .ond circuit means for producing a third controlsignal,

and combining circuit means for actuating said alarm device uponoccurrence of said third control signal and either said first or saidsecond control signals.

2. An electronic identifying apparatus as defined in claim 1 and whereinsaid third circuit means comprises fourth means for making the thirdcircuit means re-' sponsiveto a binary signal of only said first binarystate to'produce said third control signal and wherein said combiningcircuit means comprises logic means for actuating saidalarm deviceeither in response to said second control signal or upon a concurrenceof said third control signal and said first control signal.

3. An electronic security apparatus as defined in claim 2 and whereinsaid fourth circuit means is responsive only to a binary signal on atleast one of the input conductors of said first subset.

4. An electronic security apparatus as defined in claim 1 and furthercomprising signal delay means connected therein for delaying actuationof said alarm device for a time after binary signals are applied to saidplurality of input conductors.

5. An electronic identifying apparatus for use with valid binary codeunlocking devices which establish a first binary code and a secondbinary code or codes comprising, input circuit means having a pluralityof input means on which said binary codes are to be established, firstdecoding means connected to said input means responsive to said firstbinary code on said input means for actuating a lock mechanism, seconddecodswitching means comprises means for switching said second decodingmeans to be responsive to overrule actuation by every device of saidsubgroup irrespective of said third binary codes.

7. An electronic identifying apparatus as defined in claim 6 and whereinsaid switching means comprises means for switching said second decodingmeans to be responsive either to overrule actuation by at least one ofsaid third binary codes of an individual device or to overrule actuationby every device of said subgroup.

8. An electronic identifying apparatus as defined in claim 5 and furthercomprising means for actuating an alarm device upon establishment of abinary code on said plurality of input means when said code results innonactuation of said lock mechanism.

9. An electronic identifying apparatus having a plurality of inputconductors upon which a valid code of binary signals must beapplied toidentify valid devices for actuating an unlocking mechanism andactivating an alarm for invalid devices, 'said apparatus being for usegenerally with a plurality of said devices, said code including a firstgroup of binary signals for signifying compliance of the devices with ageneral predetermined permutation and a second group of binary signalsfor identifying ruled-out devices of the plurality which are to bespecifically excluded from actuating the mechanism, comprising firstdecoding means for automatically examining said first group of signalsand ing means responsive to said second binary code for overriding thefirst decoding means to prevent actuation of said mechanism thereby,switching means for selectively enabling and disabling said seconddecoding means to provide selective actuation of said mechanism byunlocking devices having a particular second binary code.

6. An electronic identifying apparatus as defined in claim 5 and whereinsaid input circuit means comprises means for receiving various thirdbinary codes for differentiating between individual unlocking deviceswhich establish said second code and wherein said for providing a firstcontrol signal upon said compliance, second decoding means forautomatically examining said second group of binary signals and forproducing a second control signal upon identifying ruledout devices,first combining means for actuating the unlocking mechanism in responseto devices that comply are not ruled out, and second combining means foractuating the alarm in response to devices that are ruled out.

10. An electronic identifying apparatus as defined in claim 9 andwherein said second group has an initial number of binary signals andsaid second decoding means comprises a multiplicity of separate decodingmeans for identifying ruled-out devices based on said second grouphaving said initial number of binary signals, and including switchingmeans for combining said separate decoding means into fewer decodingmeans for identifying fewer ruled-out devices based on said second grouphaving a number ofbinary signals greater than said initial number. 7

11. An electronic identifying apparatus having a device to be unlockedin response to the establishment of a predetermined binary code or codeson a plurality of,

input conductors including first and second subsets, on each conductorof which a signal of first and second binary states respectively is tobe established, means for inhibiting unlocking of the device upon a lockinhibit signal, an alarm device, first combining means connected withsaid second subset for producing said lock inhibit signal and an alarmcontrol signal in the absence of said second binary state on at leastone predetermined conductor of said second subset, and second combiningmeans for actuating said alarm device upon said alarm control signal;said first combining means having means for producing said lock inhibitsignal but not said alarm control signal in the absence of said secondbinary state on at least one other preselected conductor of said secondsubset.

UNITED STATES PATENT oFFIC I CERTHWCATE @F CURREQ'HON Patent No.3,851,:3lh Dated November 26, 1974+ Inventor(s) Robert A. Hedin It' iscertified that error appears in the above-identified patent and thatsaid Letters Patent are hereby corrected as shown below:

Column 10, line LL72 "69" should read "'68 -=--6 Signed and sealed this11th day of March 1975.

LSEAL) Attest:

C. MARSHALL DANN RUTH C. MASON Commissioner of Patents Attesting Officerand Trademarks

1. An electronic identifying apparatus having a device to be unlocked inresponse to the establishment of a predetermined binary code or codes, aplurality of input conductors including first and second subsets, eachconductor of said first and second subset capable of having a signal offirst and second binary states respectively established thereon, analarm device, first circuit means connected with said first subset forproducing a first control signal in the absence of said first binarystate on at least one conductor of said first subset, second circuitmeans connected with said second subset for producing a second controlsignal in the absence of said second binary state on at least oneconductor of said second subset, third circuit means connected toreceive a binary signal from at least one of said plurality ofconductors upon attempted connection of said first and second subsets tosaid first and second circuit means for producing a third controlsignal, and combining circuit means for actuating said alarm device uponoccurrence of said third control signal and either said first or saidsecond control signals.
 2. An electronic identifying apparatus asdefined in claim 1 and wherein said third circuit means comprises fourthmeans for making the third circuit means responsive to a binary signalof only said first binary state to produce said third control signal andwherein said combining circuit means comprises logic means for actuatingsaid alarm device either in response to said second control signal orupon a concurrence of said third control signal and said first controlsignal.
 3. An electronic security apparatus as defined in claim 2 andwherein said fourth circuit means is responsive only to a binary signalon at least one of the input conductors of said first subset.
 4. Anelectronic security apparatus as defined in claim 1 and furthercomprising signal delay means connected therein for delaying actuationof said alarm device for a time after binary signals are applied to saidplurality of input conductors.
 5. An electronic identifying apparatusfor use with valid binary code unlocking devices which establish a firstbinary code and a second binary code or codes comprising, input circuitmeans having a plurality of input means on which said binary codes areto be established, first decoding means connected to said input meansresponsive to said first binary code on said input means for actuating alock mechanism, second decoding means responsive to said second binarycode for overriding the first decoding means to prevent actuation ofsaid mechanism thereby, switching means for selectively enabling anddisabling said second decoding means to provide selective actuation ofsaid mechanism by unlocking devices having a pArticular second binarycode.
 6. An electronic identifying apparatus as defined in claim 5 andwherein said input circuit means comprises means for receiving variousthird binary codes for differentiating between individual unlockingdevices which establish said second code and wherein said switchingmeans comprises means for switching said second decoding means to beresponsive to overrule actuation by every device of said subgroupirrespective of said third binary codes.
 7. An electronic identifyingapparatus as defined in claim 6 and wherein said switching meanscomprises means for switching said second decoding means to beresponsive either to overrule actuation by at least one of said thirdbinary codes of an individual device or to overrule actuation by everydevice of said subgroup.
 8. An electronic identifying apparatus asdefined in claim 5 and further comprising means for actuating an alarmdevice upon establishment of a binary code on said plurality of inputmeans when said code results in nonactuation of said lock mechanism. 9.An electronic identifying apparatus having a plurality of inputconductors upon which a valid code of binary signals must be applied toidentify valid devices for actuating an unlocking mechanism andactivating an alarm for invalid devices, said apparatus being for usegenerally with a plurality of said devices, said code including a firstgroup of binary signals for signifying compliance of the devices with ageneral predetermined permutation and a second group of binary signalsfor identifying ruled-out devices of the plurality which are to bespecifically excluded from actuating the mechanism, comprising firstdecoding means for automatically examining said first group of signalsand for providing a first control signal upon said compliance, seconddecoding means for automatically examining said second group of binarysignals and for producing a second control signal upon identifyingruled-out devices, first combining means for actuating the unlockingmechanism in response to devices that comply are not ruled out, andsecond combining means for actuating the alarm in response to devicesthat are ruled out.
 10. An electronic identifying apparatus as definedin claim 9 and wherein said second group has an initial number of binarysignals and said second decoding means comprises a multiplicity ofseparate decoding means for identifying ruled-out devices based on saidsecond group having said initial number of binary signals, and includingswitching means for combining said separate decoding means into fewerdecoding means for identifying fewer ruled-out devices based on saidsecond group having a number of binary signals greater than said initialnumber.
 11. An electronic identifying apparatus having a device to beunlocked in response to the establishment of a predetermined binary codeor codes on a plurality of input conductors including first and secondsubsets, on each conductor of which a signal of first and second binarystates respectively is to be established, means for inhibiting unlockingof the device upon a lock inhibit signal, an alarm device, firstcombining means connected with said second subset for producing saidlock inhibit signal and an alarm control signal in the absence of saidsecond binary state on at least one predetermined conductor of saidsecond subset, and second combining means for actuating said alarmdevice upon said alarm control signal, said first combining means havingmeans for producing said lock inhibit signal but not said alarm controlsignal in the absence of said second binary state on at least one otherpreselected conductor of said second subset.